A Decimal / Binary Multi-operand Adder using a Fast Binary to Decimal Converter-A Review
Volume: 5 - Issue: 10 - Date: 01-10-2016
Approved ISSN: 2278-1412
Published Id: IJAECESTU252 | Page No.: 614-618
Author: Ruchi Bhatt
Co- Author: Divyanshu Rao, Ravi Mohan
Abstract:-– Decimal arithmetic has obtained considerable attention presently due to its availability for
many financial and commercial applications, where precision is very important. Binary digits have a
disadvantage of not being able to represent digits like 0.1 or 0.7, needs an infinitely re-occurring
binary number. The availability of multi-operand decimal adders can ease of financial and
commercial implementations depend on existing huge databases. The contemporaneous addition of
many decimal numbers is the general operation in multiplication and division algorithms. Multi- operand addition is an important operation as it is a core element of arithmetic operations, such as
division and multiplication. In case of decimal multiplication Multi-operand decimal addition comes
in handy for swiftly summing large amounts of decimal data. This project introduces a multi-operand
decimal addition algorithm by employing high speed binary to BCD converter circuit, which fastness
the procedure of decimal sum when numerous BCD operands are added together. A Novel design for
7-bit binary to BCD converter circuit is proposed
Key Words:-BCD, Decimal / Binary Multi-operand Adder, Multi Operand Adder, FPGA
Area:-Engineering
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