Low-Cost FIR Filter Designs Based on Faithfully Rounded Truncated Multiple Constant Multiplication/Accumulation
Volume: 4 - Issue: 08 - Date: 01-08-2015
Approved ISSN: 2278-1412
Published Id: IJAECESTU246 | Page No.: 550-554
Author: Neha Bharti
Co- Author: Jaikaran Singh Chauhan
Abstract:-Low-cost finite impulse response (FIR) designs are presented using the concept of
faithfully rounded truncated multipliers. We jointly consider the optimization of bit width and
hardware resources without sacrificing the frequency response and output signal precision.
Nonuniform coefficient quantization with proper filter order is proposed to minimize total area
cost. Multiple constant multiplication/accumulation in a direct FIR structure is implemented using
an improved version of truncated multipliers. Comparisons with previous FIR design approaches
show that the proposed designs achieve the best area and power results
Key Words:-Digital signal processing (DSP), Faithful rounding, Finite impulse response (FIR) filter, truncated multipliers, VLSI design
Area:-Engineering
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